Class D amplifiers, otherwise known as switching amplifiers, are devices which amplify input analog signals and deliver power to a load by first converting them to a series of modulated square wave pulses, controlling a power stage with those pulses to create a high-amplitude square wave, and then converting the square wave into an high-amplitude output analog signal which, ideally, is equivalent to the input analog signal multiplied by some gain. They are well known in the art to have a much higher efficiency than their analog counterparts, because the output power devices only ever operate as an ON/OFF switch. That is to say, no power is lost as heat, as in the case of their linear amplifier counterparts. Thus, Class D amplifiers theoretically have an efficiency of 100% with practical applications of such devices typically having efficiencies well over 90% and maintain this efficiency with the variation of input signal, while linear analog amplifiers can achieve a theoretical maximum of about 78% and much lower at lower input signals.
A typical method of pulse modulation is Pulse Width Modulation. Pulse Width Modulation (PWM), has a number of implementations which each determine differently when the voltage should switch from the high to the low level (or vice versa). For example, in one common form of PWM, the pulse width modulator combines an input analog signal with a high frequency triangular waveform and compares it with an upper and lower threshold voltage. The triangular waveform is generated by a feedback loop which includes the amplifier power stage, in a self oscillating configuration. The advantage of such a configuration is that this feedback loop not only generates a triangular waveform, but also provides feedback for the output signal, improving amplifier performance. Each time the negative-going slope of the triangular waveform reaches the lower threshold it switches to the positive-going slope and the conversion output switches to the low voltage; conversely, each time the positive-going slope of the triangular waveform reaches the upper threshold it switches to the negative-going slope and the conversion output switches to the high voltage. The result is a square wave with modulated width or duty cycle. In this type of class D amplifier, the frequency of the square wave varies with amplifier input signal. Some other class D amplifiers have an independent triangular waveform generator running at a constant frequency. In this configuration, both threshold voltages are equal and proportional to amplifier input signal, and the PWM output voltage switches from high to low (or vice versa) every time the triangular generator voltage crosses input voltage.
The result of this conversion is then used to turn ON and OFF the power stage devices, resulting in a high efficiency amplification. After amplification of the pulse train, a low-pass filter connected to amplifier output eliminates the unwanted high frequency components from the overall output signal.
A drawback of Class D amplifiers is that they suffer signal distortion issues due to their switching operation. For instance, one cause of this distortion is that the power stage devices do not switch ON and OFF at the exact moments determined by the pulse width modulator. The delay between desired and achievable switching times varies and depends on the amplifier output voltage, output current and frequency, and results in nonlinear distortions. Furthermore, additional difficulties in reducing class D amplifier distortions come from the rapid variations in the switching delays, which generate higher order harmonics in the output signal. Despite these distortions, Class D amplifiers are still used in high power applications due to their efficiency, and thus, efforts are now directed towards reducing the nonlinear distortions.
Some basic techniques for reducing such distortions exist, and commonly use linear negative feedback loops. In such designs, typically the stronger the gain of the feedback loop, the higher the level of distortion reduction is. Unfortunately the gain of feedback loop is limited by the ratio of switching frequency to the highest input signal frequency, and by the stability of the system. Some designs of self oscillating amplifiers use a second order integrator to reduce distortions coming from the integrator output.
U.S. Pat. No. 6,924,700 to Taura et al. discloses a pulse modulated signal output from a pulse modulator and a feedback signal containing distortion caused by a power switch are integrated in a first integrator and a second integrator, respectively, and are input to input terminals of a comparator, respectively, so that a correction signal (Vc) is generated.
U.S. Pat. No. 7,777,562 to Wei et al. discloses a digital Class-D amplifier distortion suppression circuit design. A distortion suppression feedback loop is described to improve audio performance by suppressing output stage non-linearity and improving power supply noise rejection achieving reduced THD+N. The feedback loop is placed around the power stage. It forces tracking between the audio band signals at the input and output of the power stage by automatically adjusting the gating signal timing based on sensed effective duty ratio error. Error sensing and compensation are performed using techniques that lend to simple circuit implementation.
U.S. Pat. No. 7,795,970 to Kaya et al. discloses a pulse-width-modulating class D amplifier with an H-bridge output stage, and method of operating the same in which output stage dead-time is compensated. Offset logic circuitry detects various dead-time-related conditions at push-pull output drivers, and generates an offset signal applied to the amplified differential input signal, to adjust the time at which the voltage at differential signal lines crosses a ramp reference waveform. The offset signal can correspond to the duration of a disturbance (dead-time at one driver in combination with an active signal at the active driver), or the sum of that disturbance duration with a dead-time at the active driver. The offset signal is generated by charging a capacitor for the duration of this disturbance, or disturbance plus dead-time. According to another approach, error is reduced by charging a capacitor for each transition of the signal for a duration of the dead-time of the active driver.
U.S. Application Publication No. 2010/0321570 to Odagiri discloses a triangular-wave correction circuit which compensates a gradient of a triangular wave provided to a triangular-wave signal generator which supplies a triangular wave signal used as a PWM carrier to a comparison circuit for performing PWM modulation of an input signal.
U.S. Pat. No. 7,518,442 to Dijkstra et al. discloses a class D amplifier including a modulator and a class D power stage. The modulator provides a PWM output signal to the class D power stage. For each pulse of the PWM input signal, the class D amplifier provides a corresponding pulse in the PWM output signal, such that the pulse is terminated when the area under the pulse of the output of the class D power stage is substantially equal to the area under the pulse of the corresponding PWM input signal. In this way, the class D amplifier provides instantaneous per-pulse PWM feedback.
U.S. Pat. No. 7,265,617 to Ohkuri discloses a class D amplifier having switching amplifying unit, which includes a pair of switching elements. The unit drives the switching elements and generates pulse amplified switching signals. The amplifier also has a signal-generating unit, which generates pulse width modulation signals each for driving the switching elements and supplies the generated pulse-width modulation signals to the switching amplifying unit. The switching amplifying unit includes a detecting sub-unit, which detects an operating state of the switching elements. The signal generating unit includes a dead-time-setting sub-unit, which sets dead time relative to the switching elements by delaying each of the pulse width modulation signals using propagation delay times in logic devices. The signal generating unit also includes a control sub-unit, which controls the dead-time-setting sub-unit based on a detected result of the detecting sub-unit to change the dead time based on the operating state of the switching elements.
Therefore, it would be advantageous to provide a device that overcomes the aforementioned difficulties.